文献类型：会议论文

英文题名：Fast Algorithm and VLSI Architecture Design of Rough Mode Decision for AVS3

作者：Su, Weitong[1,3];Xiang, Guoqing[2,3];Huang, Xiaoleng[3,4];Zhang, Peng[3];Zhao, Liping[5];Yan, Wei[1]

机构：[1]Peking Univ, Sch Software & Microelect, Beijing, Peoples R China;[2]Peking Univ, Sch Comp Sci, Beijing, Peoples R China;[3]Peking Univ, Adv Inst Informat Technol, Hangzhou, Peoples R China;[4]Hangzhou Dianzi Univ, Commun Engn Sch, Hangzhou, Peoples R China;[5]Shaoxing Univ, Dept Comp Sci & Engn, Shaoxing, Peoples R China

会议论文集：IEEE International Conference on Consumer Electronics (ICCE)

会议日期：JAN 06-08, 2023

会议地点：Las Vegas, NV

语种：英文

外文关键词：AVS3; intra prediction; RMD; CU; hardware architecture

外文摘要：AVS3 video coding standard is the third generation standard developed by China AVS working group. Its first phase profile achieves approximately a 30% bit-rate savings than AVS2 for 4K ultra-high-resolution videos, but also brings a lot of encoding time complexity. In this paper, a sub-block splicing method for intra prediction is proposed. We simplify the calculation process of Rate Distortion Optimization (RDO) cost for different Coding Units (CUs) to increase the parallelism of the Rough Mode Decision (RMD) process and reduce the encoding time. Together a hardware architecture corresponding to the algorithm is proposed. Experiments show that the proposed algorithm can save 20% encoding time with an average of 0.63% BD-rate increase. And the proposed hardware architecture can support the real-time encoding of 4K videos at 30fps with an area around 0.54mm(2).